A Wide-Range ISFET Readout Circuit with Low-Power Linearity Enhancement.
Kaichang ChenPrateek TripathiNicolas MoserPantelis GeorgiouPublished in: ISCAS (2023)
Keyphrases
- low power
- wide range
- high speed
- logic circuits
- cmos technology
- power reduction
- power consumption
- power dissipation
- low cost
- gate array
- vlsi circuits
- delay insensitive
- high power
- single chip
- mixed signal
- wireless transmission
- digital signal processing
- image processing
- image enhancement
- vlsi architecture
- nm technology
- low voltage
- low power consumption
- real time
- multi channel