An Efficient Hardware Architecture for Block Based Image Processing Algorithms.
Tomasz KryjakMarek GorgonMateusz KomorkiewiczPublished in: ARC (2016)
Keyphrases
- image processing algorithms
- hardware architecture
- hardware implementation
- field programmable gate array
- processing elements
- image processing
- efficient implementation
- signal processing
- software implementation
- hardware architectures
- gradient operators
- multiscale
- visual sensor networks
- motion compensation
- associative memory
- motion estimation
- medical images
- computer vision