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A Low-Power Analog Delay Line Using a Current-Splitting Method for 3-D Ultrasound Imaging Systems.
Ji-Yong Jeong
Jae-Sung An
Sung-Jin Jung
Seong-Kwan Hong
Oh-Kyong Kwon
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2018)
Keyphrases
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low power
imaging systems
high speed
low cost
matching algorithm
power consumption
real time
computational complexity
pairwise
image quality
vlsi circuits