A bit-serial column parallel processing architecture for on-sensor discrete Fourier transform.
Shoji KawahitoTatsuya EkiYoshiaki TadokoroPublished in: ISCAS (4) (2001)
Keyphrases
- parallel processing
- discrete fourier transform
- distributed processing
- cmos image sensor
- parallel architecture
- fourier transform
- processing speed
- processing units
- parallel computers
- real time
- computational power
- frequency domain
- ibm sp
- analog to digital converter
- parallel architectures
- radon transform
- pc cluster
- graphic processing unit
- multi channel
- electronic circuits
- detection method
- computational complexity
- image sequences