Highly-parallel hardware implementation of optimal ate pairing over Barreto-Naehrig curves.

Tengfei Wang Wei Guo Jizeng Wei

Published in: Integr. (2019)

Keyphrases

hardware implementation
highly parallel
efficient implementation
signal processing
image processing algorithms
field programmable gate array
hardware design
parallel architectures
image processing
scheduling problem
computing systems
single chip
neural network
distributed systems
single pass
fpga device