A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 μm CMOS.

David W. Cline Paul R. Gray

Published in: IEEE J. Solid State Circuits (1996)

Keyphrases

analog to digital converter
power consumption
delta sigma
low power
image sensor
mixed signal
power management
cmos image sensor
real time
circuit design
design considerations