Top-level validation of system-on-chip in Esterel Studio.

Gérard Berry Lionel Blanc Amar Bouali Jerome Dormoy

Published in: HLDVT (2002)

Keyphrases

circuit design
hardware and software
higher level
low level
levels of abstraction
real time
neural network
information retrieval
genetic algorithm
knowledge base
high level
preprocessing
artificial neural networks
data processing
power consumption
pixel level