NAPA C: Compiling for a Hybrid RISC/FPGA Architecture.
Maya B. GokhaleJanice M. StonePublished in: FCCM (1998)
Keyphrases
- hardware architecture
- hardware architectures
- low power consumption
- hardware implementation
- xilinx virtex
- real time
- dedicated hardware
- hardware design
- software implementation
- instruction set
- fpga implementation
- field programmable gate array
- high speed
- low cost
- fpga technology
- processing elements
- power consumption
- application specific
- parallel architecture
- management system
- systolic array
- polynomial neural networks
- verilog hdl
- fpga device
- low power
- parallel processing
- signal processing
- multiresolution
- database systems