Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit.
Hoseok ChangJunho ChoWonyong SungPublished in: SiPS (2006)
Keyphrases
- single instruction multiple data
- processor array
- processing elements
- associative memory
- software architecture
- feature vectors
- array processor
- processing units
- massively parallel
- memory usage
- memory management
- multithreading
- memory requirements
- computing power
- random access
- network architecture
- parallel processing
- sparse matrix
- memory size
- functional units
- management system
- neural network