Low power design flow with static and statistical timing analysis.
Ko-Chi KuoHsueh-Ta KoPublished in: ISPACS (2012)
Keyphrases
- low power
- single chip
- low power consumption
- low cost
- power consumption
- high speed
- logic circuits
- vlsi architecture
- power dissipation
- mixed signal
- digital signal processing
- cmos technology
- gate array
- vlsi circuits
- high power
- low complexity
- design process
- circuit design
- image processing
- image sensor
- multi channel
- efficient implementation
- power reduction
- wireless transmission
- signal processor