Low-power pipelined phase accumulator using CMOS-CML hybrid F/Fs for pre-skewing operation.
Yun-Hwan JungYong Sin KimYohan HongJu Eon KimKwang-Hyun BaekPublished in: IEICE Electron. Express (2013)
Keyphrases
- low power
- power consumption
- high speed
- low cost
- single chip
- cmos technology
- vlsi circuits
- high power
- hough transform
- wireless transmission
- image sensor
- feature selection
- digital signal processing
- ultra low power
- vlsi architecture
- delay insensitive
- logic circuits
- low power consumption
- power reduction
- mixed signal
- data flow
- gate array
- error correction