Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor.
Chin-Teng LinYuan-Chu YuLan-Da VanPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2008)
Keyphrases
- cost effective
- low cost
- systolic array
- parallel architecture
- digital signal
- single chip
- reconfigurable architecture
- parallel processing
- cost effectiveness
- frequency domain
- floating point
- instruction set
- computation intensive
- fast fourier transform
- fourier transform
- general purpose
- distributed memory
- video compression
- hardware implementation
- data center
- discrete cosine transform
- real time
- embedded systems
- functional units
- shared memory
- video data
- high speed
- motion estimation