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A 0.64-pJ/Bit 28-Gb/s/Pin High-Linearity Single-Ended PAM-4 Transmitter With an Impedance-Matched Driver and Three-Point ZQ Calibration for Memory Interface.

Yong-Un JeongHyunkyu ParkChangho HyunJoo-Hyung ChaeShin-Hyun JeongSuhwan Kim
Published in: IEEE J. Solid State Circuits (2021)
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