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A CMOS Class-D Line Driver Employing a Phase-Locked Loop Based PWM Generator.

Jingxue LuHyejeong SongRanjit Gharpurey
Published in: IEEE J. Solid State Circuits (2014)
Keyphrases
  • power consumption
  • high speed
  • phase locked loop
  • line segments
  • analog vlsi
  • control system