Optimizing matrix multiplication for a short-vector SIMD architecture - CELL processor.

Jakub Kurzak Wesley Alvaro Jack J. Dongarra

Published in: Parallel Comput. (2009)

Keyphrases

matrix multiplication
cell processor
processor array
parallel algorithm
single instruction multiple data
feature vectors
message passing
pairwise
real time
similarity measure
higher order
parallel implementation
massively parallel