A Hybrid-Pipelined Architecture for FPGA-based Binary Weight DenseNet with High Performance-Efficiency.

Shihao Zeng Yihua Huang

Published in: HPEC (2020)

Keyphrases

hardware implementation
field programmable gate array
high efficiency
pipelined architecture
neural network
real time
image processing
access control
cost effective
hamming distance
hybrid learning
high reliability