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Automatic property generation for formal verification applied to HDL-based design of an on-board computer for space applications.
Wesley Silva
Eduardo Augusto Bezerra
Markus Winterholer
Djones Lettnin
Published in:
LATW (2013)
Keyphrases
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formal verification
model checking
design methodology
design space
fully automatic
user interface
hardware design
computer architecture
temporal logic
space time
semi automatic
orders of magnitude
design tools
design process
computer systems
state space
case study
automated verification