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Accelerating Value-at-Risk estimation on highly parallel architectures.
Matthew F. Dixon
Jike Chong
Kurt Keutzer
Published in:
Concurr. Comput. Pract. Exp. (2012)
Keyphrases
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highly parallel
parallel architectures
efficient implementation
single chip
multicore processors
parallel processing
computing systems
object oriented
single pass
real time
low cost
parallel programming
parallel computers