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Remanent SRAM Structure for Runtime Reconfigurable FPGA.
Nicolas Bruchon
Lionel Torres
Gilles Sassatelli
Gaston Cambon
Published in:
ReCoSoC (2006)
Keyphrases
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low cost
hardware implementation
field programmable gate array
power reduction
high speed
general purpose
geometric structure
systolic array
signal processing
tree structure
hierarchical structure
digital signal