A Method and FPGA Architecture for Real-Time Polymorphic Reconfiguration.

Jason V. Paul Samuel J. Stone Yong C. Kim Robert W. Bennington

Published in: FPT (2007)

Keyphrases

real time
dedicated hardware
high precision
synthetic data
data sets
experimental evaluation
pipelined architecture
signal processing
high speed
cost function
significant improvement
pairwise
preprocessing
computational cost
high accuracy
detection method
control system
fpga implementation
learning algorithm