A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs.
Yanbin LiMing TangYuguang LiHuanguo ZhangPublished in: Integr. (2020)
Keyphrases
- higher order
- security level
- higher order logic
- high security
- asynchronous circuits
- high order
- cryptographic protocols
- lambda calculus
- java card
- intrusion detection
- network security
- natural images
- verification method
- pairwise
- image processing
- security policies
- integrity verification
- information flow
- flow field
- modal logic
- information security
- model checking
- security issues
- application level
- smart card
- logic programming
- access control
- image quality
- high speed
- low cost