Design of simple and high speed VLSI core for the protection of mass storages.

Ming-Haw Jing Zih-Heng Chen Jian-Hong Chen Cheng-Yi Wu

Published in: APCCAS (2008)

Keyphrases

low cost
high speed
low power
gate array
real time
case study
digital signal processing
vlsi design
data sets
image processing
user interface
collaborative learning
design methodology
optimal design
chip design