How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining.

Matthias Függer Andreas Dielacher Ulrich Schmid

Published in: EDCC (2010)

Keyphrases

fault tolerant
distributed systems
high speed
fault tolerance
safety critical
vlsi design
high availability
high assurance
low cost
expert systems
state machine
computer systems
signal processing
power consumption
load balancing
intelligent systems
evolvable hardware
management system
database systems