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A Single-Chip 25.3-28.0 GHz SiGe BiCMOS PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset and -96 dBc Reference Spurs.
Mark D. Hickle
Kevin Grout
Curtis Grens
Gregory M. Flewelling
Steven Eugene Turner
Published in:
BCICTS (2021)
Keyphrases
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single chip
high speed
low power
mixed signal
cmos technology
low cost
frequency band
frame rate
embedded processors
image sensor
high frequency
power consumption
real time
mathematical morphology
cmos image sensor
signal processor