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On the Impact of Partial Sums on Interconnect Bandwidth and Memory Accesses in a DNN Accelerator.
Mahesh Chandra
Published in:
ICIIS (2020)
Keyphrases
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computational power
high speed
memory requirements
compute intensive
response time
random variables
memory usage
computing power
storage capacity
data sets
learning algorithm
low cost
main memory
access patterns
network bandwidth
high bandwidth