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An Up to 10MHz 6.8% Minimum Duty Ratio GaN Driver with Dual-MOS-Switches Bootstrap and Adaptive Short-Pulse Based High-CMTI Level Shifter Achieving 6.05% Efficiency Improvement.

Xin MingZhiyi LinTian-yi SunYao QinYuan-Yuan LiuChun-wang ZhuangZhao-ji LiBo Zhang
Published in: CICC (2022)
Keyphrases
  • high efficiency
  • wide range
  • high speed
  • cost reduction
  • significant improvement
  • computational efficiency
  • higher level
  • binary images
  • high precision
  • standard deviation
  • parallel computing
  • maintenance cost