Logarithmic Multiplier in Hardware Implementation of Neural Networks.
Uros LotricPatricio BulicPublished in: ICANNGA (1) (2011)
Keyphrases
- hardware implementation
- neural network
- efficient implementation
- signal processing
- software implementation
- hardware architecture
- dedicated hardware
- image processing algorithms
- pattern recognition
- neural network model
- artificial neural networks
- worst case
- fpga implementation
- hardware design
- field programmable gate array
- back propagation
- memory management
- pipeline architecture
- parallel architecture
- real time
- multiresolution
- fine grained
- general purpose
- fuzzy logic
- feature extraction
- image processing
- genetic algorithm