A general DSP processor at the cost of 23K gates and 1/2 a man-year design time.

Eric Tell Mikael Olausson Dake Liu

Published in: ICASSP (2) (2003)

Keyphrases

signal processing
building blocks
special case
high speed
information systems
neural network
case study
pattern recognition
user interface
knowledge based systems
design process
closely related
expected cost
parallel processors
verilog hdl