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A 1/1.12-inch $1.4\mu\mathrm{m}$-Pitch 50Mpixel 65/28nm Stacked CMOS Image Sensor using Mulitple Sampling.

Yunhong KimYunhwan JungHaesik SulKyoungmin Koh
Published in: ISCAS (2023)
Keyphrases
  • cmos image sensor
  • dynamic range
  • single chip
  • cmos technology
  • solid state
  • parallel processing
  • processing capabilities
  • low power
  • image enhancement
  • real time
  • low cost
  • vision system
  • low power consumption