Exploring latency-power tradeoffs in deep nonvolatile memory hierarchies.
Doe Hyun YoonTobin GonzalezParthasarathy RanganathanRobert S. SchreiberPublished in: Conf. Computing Frontiers (2012)
Keyphrases
- computational power
- memory usage
- power consumption
- low latency
- data transfer
- memory requirements
- memory subsystem
- memory space
- random access
- hierarchical structure
- response time
- learning algorithm
- short term
- design decisions
- web documents
- case study
- computing power
- information systems
- genetic algorithm
- multithreading
- clock frequency
- memory bandwidth
- web prefetching
- data mining