A 25 Gbps inductorless receiver front-end in 65-nm CMOS for serial links.

Norio Chujo Takehito Kamimura Goichi Ono Fumio Yuki

Published in: ISCAS (2010)

Keyphrases

cmos technology
silicon on insulator
low cost
power consumption
metal oxide semiconductor
nm technology
back end
low power
power supply
high speed
link analysis
circuit design
low voltage
neural network
link structure
power dissipation
delay insensitive
vlsi circuits