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An architecture design of SAD based template matching for fast queue counter in FPGA.

Trio AdionoMahendra Drajat AdhinataNovi PrihatiningrumRicky DisastraRachmad Vidya Wicaksana PutraAmy Hamidah Salman
Published in: ISPACS (2016)
Keyphrases
  • template matching
  • matching algorithm
  • object recognition
  • deformable templates
  • hardware design
  • cross correlation
  • single chip