On VLSI decompositions for deBruijn graphs.

Toshinori Yamada Satoshi Imai Shuichi Ueno

Published in: ISCAS (6) (1999)

Keyphrases

signal processing
neural network
vlsi circuits
high speed
graph matching
graph representation
vlsi design
graph databases
graph theory
bipartite graph
case study
graph theoretic
graph clustering
graph kernels
series parallel
structured objects
directed graph
single chip
maximal cliques
low cost
graph isomorphism