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An Efficient Parallel Architecture for Convolutional Neural Networks Accelerator on FPGAs.
Hongmin Huang
Xueming Li
Yadong Qin
Xianghong Hu
Xiaoming Xiong
Published in:
HP3C (2021)
Keyphrases
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parallel architecture
convolutional neural networks
hardware implementation
field programmable gate array
parallel implementation
systolic array
parallel processing
convolutional network
high level synthesis
shared memory
distributed memory
efficient implementation
computer vision
high resolution
processing elements
synthetic aperture sonar