A Low-Power DSP-Enhanced 32-Bit EISC Processor.
Hyun-Gyu KimHyeong-Cheol OhPublished in: HiPEAC (2005)
Keyphrases
- low power
- high speed
- digital signal processing
- single chip
- gate array
- low cost
- power consumption
- low power consumption
- random access memory
- wireless transmission
- vlsi architecture
- cmos technology
- high power
- low voltage
- systolic array
- vlsi circuits
- digital signal processor
- delay insensitive
- logic circuits
- power dissipation
- computer architecture
- mixed signal
- signal processor
- analog to digital converter
- power reduction
- image sensor
- low complexity
- power saving
- signal processing