AVISPA: a massively parallel reconfigurable accelerator.
Jeroen A. J. LeijtenGeoffrey BurnsJos HuiskenErwin WaterlanderAntoine van WelPublished in: SoC (2003)
Keyphrases
- massively parallel
- field programmable gate array
- parallel computing
- hardware architecture
- fine grained
- message passing interface
- high performance computing
- parallel computers
- parallel architectures
- mesh connected
- compute intensive
- low cost
- parallel programming
- processing elements
- special case
- computing systems
- parallel implementation
- hardware implementation
- distributed systems
- markov random field
- objective function