An Efficient Router Architecture and Its FPGA Prototyping to Support Junction Based Routing in NoC Platforms.
Muhammad Awais AslamShashi KumarRickard HolsmarkPublished in: DSD (2013)
Keyphrases
- network on chip
- routing algorithm
- packet switching
- multi processor
- wireless sensor networks
- middleware architecture
- hardware implementation
- real time
- interconnection networks
- hardware architecture
- packet switched
- fpga implementation
- hardware design
- ad hoc networks
- parallel architecture
- software implementation
- routing protocol
- systolic array
- shortest path
- high speed
- network resources
- single chip
- efficient implementation
- network layer
- network traffic
- network simulator
- agent platform
- signal processing
- low cost