Dynamically compressible context architecture for low power coarse-grained reconfigurable array.
Yoonjin KimRabi N. MahapatraPublished in: ICCD (2007)
Keyphrases
- computing systems
- low power
- coarse grained
- low cost
- fine grained
- vlsi architecture
- power consumption
- high speed
- power reduction
- cmos technology
- image sensor
- real time
- multithreading
- high power
- digital signal processing
- mixed signal
- vlsi circuits
- systolic array
- nm technology
- ultra low power
- logic circuits
- vlsi implementation
- hardware implementation
- hardware and software
- high level
- hiv protease
- digital camera
- single chip
- low voltage
- design methodology
- data flow
- cmos image sensor
- signal processor