Hierarchical flowgraph integration for VLSI array processors.

Sun-Yuan Kung Jurgen Annevelink Patrick M. Dewilde S. C. Lo

Published in: ICASSP (1985)

Keyphrases

processor array
parallel algorithm
high speed
parallel processing
parallel implementation
vlsi design
hierarchical model
vlsi implementation
mesh connected
real time
data integration
coarse to fine
high performance computing