High Performance Reconfigurable FIR Filter Architecture Using Optimized Multiplier.

J. L. Mazher Iqbal S. Varadarajan

Published in: Circuits Syst. Signal Process. (2013)

Keyphrases

hardware implementation
fir filters
vlsi implementation
finite impulse response
floating point
pattern recognition
filter design
impulse response
computer vision
signal processing
filter bank
standard deviation
frequency response