A FPGA Stereo Matching Algorithm Modeled By DSP Builder.
Xiang ZhangZhang-wei ChenPublished in: J. Comput. (2014)
Keyphrases
- stereo matching algorithm
- stereo matching
- verilog hdl
- signal processing
- stereo images
- stereo vision
- mobile platform
- adaptive window
- disparity map
- depth map
- hardware implementation
- depth data
- dynamic programming
- image pairs
- stereo pair
- image processing
- stereo algorithm
- stereo correspondence
- field programmable gate array
- real time
- belief propagation
- ground truth
- computer vision