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Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs.

Jens TrommerMaik SimonStefan SlesazeckWalter M. WeberThomas Mikolajick
Published in: ESSDERC (2019)
Keyphrases
  • multiple independent
  • low power
  • logic circuits
  • low cost
  • power consumption
  • multi class
  • high speed
  • space charge
  • data structure
  • multi dimensional
  • flip flops