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Minimizing write operation for multi-dimensional DSP applications via a two-level partition technique with complete memory latency hiding.
Yan Wang
Kenli Li
Keqin Li
Published in:
J. Syst. Archit. (2015)
Keyphrases
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multi dimensional
signal processing
data transfer
range queries
index structure
digital signal processing
memory usage
multiple dimensions
main memory
high speed
memory space
read write
memory requirements
memory size
write operations
sequential patterns
limited memory
digital signal processors