An architecture of a high-speed digital hologram generator based on FPGA.

Young-Ho Seo Hyun-Jun Choi Ji-Sang Yoo Dong-Wook Kim

Published in: J. Syst. Archit. (2010)

Keyphrases

high speed
low power
digital holography
data acquisition
digital camera
real time
high speed networks
learning algorithm
high resolution
low cost
frame rate