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Efficient implementation of the Galois Counter Mode using a carry-less multiplier and a fast reduction algorithm.

Shay GueronMichael E. Kounavis
Published in: Inf. Process. Lett. (2010)
Keyphrases
  • efficient implementation
  • hardware implementation
  • active set
  • formal concept analysis
  • efficient processing
  • formal concepts
  • floating point
  • sufficient conditions
  • highly parallel