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A 130nm CMOS Programmable Analog Standard Cell Library.
Jennifer Hasler
Praveen Raj Ayyappan
Afolabi Ige
Pranav O. Mathews
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
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analog vlsi
low cost
circuit design
floating gate
signal processing
cmos technology
power consumption
silicon on insulator
neural network
three dimensional
parallel processing
delay insensitive
vlsi circuits