Real-Time Implementation of Parallel Architecture Based Noise Minimization from Speech Signals on FPGA.
Deepak Kumar GuptaVijay Kumar GuptaMahesh ChandraGaurav VermaPublished in: Wirel. Pers. Commun. (2018)
Keyphrases
- parallel architecture
- speech signal
- hardware implementation
- synthetic aperture sonar
- systolic array
- background noise
- noisy environments
- high level synthesis
- additive noise
- dedicated hardware
- speech enhancement
- shared memory
- parallel processing
- parallel implementation
- distributed memory
- speech recognition
- fpga device
- fpga technology
- noise reduction
- efficient implementation
- noisy speech
- automatic speech recognition systems
- xilinx virtex
- noise model
- field programmable gate array
- automatic speech recognition
- vocal tract
- single channel
- signal to noise ratio
- clock frequency
- processing elements
- speech quality
- signal processing
- multiscale
- fpga hardware
- machine learning