Hardware implementation of the SUMIS detector using high-level synthesis.
Werner HaselmayrGeorg MöstlStefan SeeberAndreas SpringerPublished in: ISCAS (2015)
Keyphrases
- hardware implementation
- high level synthesis
- parallel architecture
- signal processing
- efficient implementation
- fpga implementation
- dedicated hardware
- image processing algorithms
- hardware design
- software implementation
- field programmable gate array
- pipeline architecture
- memory management
- hardware architecture
- pattern recognition
- data management
- information systems
- neural network