An Integrated 60-GHz Front-end Receiver with a Frequency Tripler Using 0.13-μm CMOS Technology.

Po-Hung Chen Min-Chiao Chen Chung-Yu Wu

Published in: ICECS (2007)

Keyphrases

cmos technology
clock frequency
low power
power consumption
spl times
high speed
low voltage
parallel processing
power dissipation
dielectric constant
low cost
mixed signal
pattern recognition
digital images
parallel architecture