Login / Signup
Experimental results obtained from a 1.6 GHz CMOS quadrature output phase locked loop with on-chip DC-DC converter.
Owen Casha
Ivan Grech
Edward Gatt
Joseph Micallef
Published in:
ICECS (2010)
Keyphrases
</>
high speed
low cost
phase locked loop
analog vlsi
real time
neural network
wireless networks
high frequency
power consumption
circuit design
power supply